1 Watt GaAsFET Power Amplifier for 1296 MHz

This power amplifier has about 30dB gain and more than 1 W  output power at 1296 MHz.
It uses two Siemens  CLY10 (75kB pdf)  GaAsFETs as active devices. It can be used as a driver
amplifier for  Mitsubishi's power amplifier module M57762 or as final stage in low-power
portable 1296 MHz station. It is also suitable for ATV use, and has been used for that purpose.

 Schematic diagram and network analyzer plot (43kB)

The amplifier is quite typical two stage common source  GaAsFET amplifier. The FETs are
matched to 50 ohm using short sections of 50 ohm microstriplines and SMD high-Q capacitors.
The input matching requires only a 4.7 pF parallel capacitor on the gate. The output matching
circuits consist of 5mm series section of 50 ohm microstripline and 3.3 pF capacitor to ground.
The matching circuits of both stages are identical. The lengths of the other 50 ohm microstripline
sections are uncritical because the impedance level is 50 ohms in those connections.

The drain supplies and gate bias voltages are fed to the active devices through high-Q SMD
inductors. There are 50 ohm resistors in series with the inductors in gate bias supplies to
terminate the gates into resistive loads at low frequencies. This enhances the stability of the
amplifier. There are 50 ohm resistors in series with 1nF capacitors in the drain supplies for
the same purpose.

The amplifier is constructed on 1.6 mm thick double sided FR4 printed circuit board. The
microstriplines are etched on one side of the board while the other side is unetched and acts
as ground plane. The RF circuitry is surface assembled on the etched side of the board.
On the unetched side there are the DC regulators etc. of the supply circuitry, assembled
in 'ugly' style above the ground plane.

Photograph of the RF side of the amplifier. (887kB)

What does not show in the photograph is that there is a ground track between the source
leads of the FETs. The middle lead of the FET is source as well as the wide lead in the top
of the package. They are connected together under the FET and also connected to the
ground plane by several pieces of soldered wire through the board. The proper RF grounding
of the source terminals is extremely critical. It is also neccessary to take care of adequate
coolind since this amplifier dissipates something like 10 W power when supplied from 13 V.

Schematic diagram of the supply circuitry. (16kB)

The GaAsFETs require negative gate voltage. The negative supply is generated using
LT1054 (341kB pdf) charge pump IC. The negative supply is regulated to -5 V with 7905 regulator.
The adjustable gate voltages for each stage are generated from the -5 V regulated
voltage with resistive voltage dividers (20 kohm trimmer potentiometers).

There is a protection circuit which allows the drain voltage to be supplied only if there is
negative voltage available. This protects the FET's against a possible failure if the LT1054
does not start up and also delays the switching on of the drain voltage until the gate voltages
are negative.

The drain supply is regulated to +8V but there are also 1.5 ohm series resistors on the
drains of both FETs. Therefore the actual drain voltages, when biased, are little above
+7 V.

Because the starting up of the LT1054 takes a while there is a separate +TX input in the
amplifier to allow fast TX/RX switching. If there is voltage below approx. 7 V in the +TX
input, the gates of both FETs are biased to -5V and the FETs are pinched off. When a
positive voltage greater than 7 V is applied in the +TX input, the FETs are biased to their
normal operating points.

Photograph of the DC side of the amplifier. (452kB) This photograph is not intended to be a
construction guide, it merely shows what I mean by 'ugly' construction.


The only thing that requires alignment are the gate bias voltages of the FET:s. The trimmers
on the gates should be preset to largest negative voltage before the drain supply is switched on.
Terminate the RF input and output ports with 50 ohm dummy loads to avoid oscillation during
the alignment.

Align the first stage first. The drain current should be measured during alignment, it can be
conveniently done by measuring the voltage drop across the 1.5 ohm resistor. Align the gate
voltage such that the drain current of the first FET is about 250 mA. Then align the second stage
using similar procedure. The drain current of the second stage should be approx. 500 mA
without any RF drive.

At 1 W RF output the drain current of the second stage drops to about 450 mA, but the first
stage current remains unchanged. The total current consumption is therefore approx. 700 mA
at 1 W RF output.

There are no PCB etching patterns available for the amplifier at the moment, sorry.

Petri Kotilainen OH3MCK